TY  - BOOK
AU  - Palnitkar, Samir 
AU  - Goel, Prabhu 
TI  - Verilog HDL : : a guide to digital design synthesis 
SN  - 9788177589184 :
U1  - 621.392 23
PY  - 2003/// [Impression 2012]
CY  - India
PB  - Taj Press
KW  - System Analysis and Design
KW  - computer architecture
KW  - Verilog (Computer hardware description language)
N1  - Include Index
ER  -